Planar Transistor Manufacture

When a silicon wafer is heated to about 1200 degrees Celsius in an atmosphere of water vapour or oxygen a skin of silicon dioxide forms on the surface. This skin is a most effective seal against the ingress of moisture at room temperatures and has made possible the method of manufacture of planar transistors which is described below.

A crystal of n-type silicon, about 1 inch in diameter, is cut into slices about 0.008 inches thick. The slices are lapped and etched to approximately 0.003 iches thickness and, if required, an epitaxial layer can be formed on one surface. The slices are now heated in an oxidising atmosphere to acquire a protective coating of silicon dioxide. At this stage each slice has a sectional view similar to that shown in (a) below. Each slice yields ultimately up to 1,000 transistors and the next stage is to mark off the individual transistors. This is achieved by a photo-lithographic process: each slice is coated in a dark room with a photo-sensitive material (known as photo-resist) and is then exposed to ultra-violet light via a mask containing an array of apertures corresponding to the base areas of the 1,000 transistors. The slice is now developed to remove the photo-resist from these regions thus exposing the silicon dioxide coating.

Next the slice is treated with an etch which removes the silicon dioxide from the exposed regions. The remainder of the photo-resist is now dissolved: the cross-section of the slice now appears as in (b) below which shows a gap in the layer of silicon dioxide defining the base area for a single transistor.

The slice is now exposed at a high temperature to a boron-rich atmosphere. The silicon dioxide coating protects the slice against diffusion of boron except at the exposed areas and here boron diffuses isotropically, i.e. horizontally under the protective coating as well as vertically into the crystal, thus forming a p-type base region. Other more precise ways of forming such a region have been developed, for example by ion implantation. This involves a sharply defined bombardment of the substrate by a beam from an ion gun which enables the active base area to be closely controlled in area and shape, a process which can be compared with precision etching. The slice is now returned to the oxidising atmosphere and a coating of silicon dioxide is formed over the base areas (and the rest of the slice) to give a cross-section similar to that shown in (c) below.

The emitter areas are now defined by a similar process of masking, photo-lithography, exposure to ultra-violet light, etching, etc., and the silicon dioxide is removed from the emitter areas to give a cross-section such as that shown in (d) below. The slice is now heated whilst exposed to an atmosphere rich in phosphorus. This forms an n-type emitter region by diffusion and the exposed area is again sealed by heating the slice in an oxidising atmosphere to form a layer of silicon dioxide. See (e) below.

Holes are now made in the silicon dioxide coating as shown in (f) to permit ohmic contacts to be made to the base and emitter areas, the position of the holes being again determined by a mask. Contacts are then made to the transistors by a process of evaporation: the slice is placed in a vacuum chamber in which aluminium is evaporated, e.g. from a hot filamant. This results in a deposition of a thin coating of aluminium over the entire face of the slice. Finally the aluminium is removed from the areas in which it is not required by a masking and selective etching operation. The slice is now divided up into individual transistors and connections are made to the base and emitter regions of each transistor as shown in (g) below. The base area of each transistor is sometimes of approximately annular shape surrounding a circular emitter area but in power transistors both base and emitter areas may be in the form of parallel strips.

Planar transistors lend themselves well to mass production. Planar technology revolutionised silicon transistor manufacture in the 1960s. The transistors are particularly robust and the protection of the silicon dioxide coating is such that even without sealing in cans the transistors will operate well under boiling water! Leakage currents are very low and the transistors can be designed to work at frequencies well over 1 GHz. In 1963 the process also made possible for the first time mass production of f.e.t.s although the pronciple of this type of transistor had been described by Shockley 11 years earlier.

Planar Transistor Production

The silicon bipolar transistor

The invention of the transistor is attributed to William Shockley

Bipolar Transistors

The Field Effect Transistor (or FET)

There are are a number of different types of FET: n-channel and p-channel junction-gate FETs or 'jugfets', n-channel and p-channel enhancement mode insulated gate FETs or 'igfets', and n-channel and p-channel depletion mode insulated gate FETs or 'igfets'. It is common, due to the form of construction, to refer to igfets as MOSFETs.


The structure and symbols for jugfets are shown below.


The Unijunction Transistor

The Unijunction Transistor

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